The present invention relates to a clamping circuit for a video signal, and more particularly to a clamping circuit which sets the pedestal level of a digital video signal produced by an analog-to-digital converter, in response to an input analog video signal.
When an analog video signal is converted into a digital video signal (PCM video signal), it is necessary to set the pedestal level of the converted digital video signal at a predetermined level. In a conventional clamping circuit, an ordinary keyed clamping circuit is arranged in front of an analog-to-digital (A/D) converter to set the pedestal level of the analog signal which is then subject to A/D conversion.
Known A/D converters are sufficiently accurate to permit a relative error in a quantizing step to be disregarded. However, such A/D converters still have a drift error throughout their quantization range. Further, there are individual characteristic variation in the marketed A/D converters.
Conventional clamping devices cannot compensate for drift errors and for individual parameter variations in given A/D conerters. Therefore, pedestal level changes or errors after the A/D conversion are unavoidable. Further, these changes produce other changes in the set-up level in the case where a plurality of digital video signals are processed in a production switcher or recorded in a video tape recorder, and, then, the processed or recorded digital video signal is restored into an analog video signal by a digital-to-analog (D/A) converter after blank insertion process. The net result is that these changes are apt to cause delicate changes in the brightness on a picture monitor since the pedestal level is the reference level (totally black picture) for the video signal.